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ASMLTWINSCANLITHOGRAPHYLAM KIYOPLASMA ETCHETCH · DEPAPPLIEDENDURA CVDDEPOSITIONEBARACMP F-REXCMPCD-SEMMETROLOGYLithographyPlasma EtchThermal / CVDCMPMetrology
Semiconductor Fabrication · Est. 1998 · Austin, TX

0.13µm to 7nm.
Your Design.
Our Silicon.

Full-service foundry serving fabless design houses, defense primes, and automotive OEMs. ITAR-registered. ISO 14644 Class 1 cleanrooms. Guaranteed capacity on mature nodes.

48,000 WPM
Wafers/Month
<0.03 /cm²
Defect Density
±1.2nm
Overlay
99.7% YTD
Uptime
01 · Lithography
±1.2nm
Overlay Accuracy (3σ)
EUV / DUV qualified · 7nm to 0.13µm

ASML TWINSCAN and NXT series steppers across six process bays. Immersion lithography for sub-28nm nodes. Dry ArF and i-line for mature nodes to 0.13µm. All tools qualified to SEMI E10 uptime standards.

Process Parameters
Minimum Feature Size
7nm
Maximum Node
0.13µm
Overlay (3σ)
±1.2nm
CD Uniformity
±0.8nm (3σ)
Stepper Wavelength
193nm / 13.5nm EUV
Throughput
275 WPH (DUV) / 180 WPH (EUV)
Wafer Size
200mm / 300mm
Focus Control
±15nm (3σ)
Resist Coat Uniformity
<0.5Å RMS
Defect Density
<0.01 /cm² (post-litho)
Qualified Tool Platforms
Overlay (3σ)
±1.4nm
CD Uniformity
±0.9nm (3σ)
Throughput
275 WPH
NA
1.35
Supported Nodes
28nm — 7nm
Wafer Size
300mm
Qualified Recipes
847
SEMI E10 Uptime
98.4%
Overlay (3σ)
±3.5nm
Throughput
240 WPH
Supported Nodes
65nm — 0.13µm
Wafer Size
200mm / 300mm
Qualified Recipes
1,240
SEMI E10 Uptime
99.1%
Resolution
350nm
Throughput
190 WPH
Supported Nodes
0.35µm — 0.13µm
Wafer Size
200mm
Qualified Recipes
412
02 · Etch & Deposition
±0.4%
Film Thickness Uniformity (1σ)
Plasma etch · CVD · ALD · PVD · 300mm qualified

Lam Kiyo dielectric and conductor etch, Applied Endura PVD, and Tokyo Electron ALD platforms. Full ALD library for high-k gate dielectrics. Copper and tungsten damascene process-of-record on 28nm and below.

Process Parameters
Etch Selectivity (Si:SiO₂)
>200:1
CD Bias Control
±1.5nm
Etch Rate Uniformity
±0.8% (1σ)
ALD Cycle Rate
0.1–0.15nm/cycle
CVD Deposition Rate
50–300nm/min
PVD Sputter Rate
200–600nm/min
Film Thickness Uniformity
±0.4% (1σ)
Metals Available
W, Cu, Al, Ti, TiN, TaN
Dielectrics Available
SiO₂, Si₃N₄, HfO₂, Al₂O₃
Max Aspect Ratio Etch
40:1
Qualified Tool Platforms
Etch Uniformity
±0.8% (1σ)
CD Bias
±1.2nm
Selectivity (Si:SiO₂)
>200:1
Chamber Config
Dual-frequency CCP
Throughput
32 WPH
Qualified Recipes
623
SEMI E10 Uptime
97.8%
Uniformity (1σ)
±0.4%
Deposition Rate
200–600nm/min
Target Materials
Ti, TiN, TaN, W, Cu seed
Throughput
45 WPH
Qualified Recipes
318
Cycle Rate
0.12nm/cycle
Conformality
>99%
Materials
HfO₂, Al₂O₃, ZrO₂, TiO₂
Temp Range
50°C — 400°C
Qualified Recipes
156
03 · Packaging & Die Prep
<2µm
Bump Height Variation (3σ)
Wafer-level packaging · Cu pillar · Flip-chip · Fan-out

Full back-end wafer processing including wafer thinning to 50µm, copper pillar and micro-bump formation, fan-out wafer-level packaging, and laser dicing. OSAT-ready FOUP handoff with full traceability.

Process Parameters
Min Bump Pitch
40µm
Bump Height Variation
<2µm (3σ)
Wafer Thinning Target
50µm — 775µm
Dicing Method
Laser / Blade / DBG
Kerf Width (Laser)
8µm
Die Strength
>800MPa (50µm wafer)
UBM Stack
Ti/Cu/Ni/Au
Solder Alloy
SAC305 / SnAg / In-based
Fan-out RDL Layers
Up to 4L
Throughput
120 WPH (bump)
Qualified Tool Platforms
Kerf Width
15–100µm
Positioning Accuracy
±0.5µm
Throughput
60 WPH
Min Die Size
0.3mm × 0.3mm
Qualified Recipes
284
Bond Accuracy
±0.5µm
Min Wafer Thickness
50µm
Wafer Size
200mm / 300mm
Throughput
20 WPH
Qualified Recipes
98
Pillar Height Range
20–120µm
Uniformity (1σ)
<1.5%
Min Pitch
40µm
Throughput
35 WPH
Qualified Recipes
67
04 · Metrology & Inspection
<0.03
Defects per cm² (post-CMP, 7nm node)
In-line CD-SEM · OCD · XRF · KLA Surfscan

100% in-line metrology on critical layers. KLA Surfscan SP7 for bare wafer inspection, Applied Materials VeritySEM for CD measurement, and Rudolph Technologies for overlay verification. All data fed to real-time SPC with automated hold triggers.

Process Parameters
Defect Density (7nm)
<0.03 /cm²
Defect Density (28nm)
<0.008 /cm²
CD Measurement Precision
±0.15nm (3σ)
Overlay Measurement
±0.3nm (3σ)
Film Thickness (XRF)
±0.1Å (1σ)
Wafer Inspection Speed
180 WPH (bright field)
Minimum Detectable Defect
18nm (SP7)
SPC Control Limits
±3σ auto-hold
Inline Sampling Rate
100% critical layers
Data Retention
10 years (ITAR-compliant)
Qualified Tool Platforms
Min Detectable Defect
18nm
Throughput
180 WPH
Sensitivity Mode
Bright-field / Dark-field
Wafer Size
300mm
False Alarm Rate
<5%
SEMI E10 Uptime
98.9%
CD Precision (3σ)
±0.15nm
Throughput
95 WPH
Min Measurable CD
5nm
Landing Energy
200eV — 2keV
Qualified Recipes
1,420
Measurement Precision
±0.1Å
Parameters / Site
Up to 40
Throughput
140 WPH
Wavelength Range
190–900nm
Qualified Recipes
534
05 · Compliance & Certifications
ITAR · ISO · IATF

Every run is traceable. Every export is controlled. Defense primes, automotive OEMs, and medical device manufacturers operate on our lines under full regulatory compliance — no waivers, no workarounds.

ITAR
ITAR Registered Facility
Valid Through
Dec 2026
M-35892-C
Issued by: U.S. Dept. of State, DDTC
Manufacturing, processing, and export of defense articles under USML Categories XI, XII, XV
ISO 14644
Cleanroom Class 1 / Class 10
Valid Through
Mar 2027
ISO-14644-1:2015
Issued by: Bureau Veritas Certification
Lithography bay: ISO Class 1. Etch/Dep bay: ISO Class 3. Assembly: ISO Class 5
IATF 16949
Automotive Quality Management
Valid Through
Sep 2026
IATF-16949:2016 · Cert #: 40218761
Issued by: TÜV SÜD America Inc.
Design, development, production, and service of semiconductor wafers for automotive applications
ISO 9001
Quality Management System
Valid Through
Jan 2027
ISO 9001:2015 · Cert #: US-QMS-29341
Issued by: DNV GL Business Assurance
Wafer fabrication, metrology, packaging, and customer support services
Additional Standards & Registrations
EAR Classification
ECCN 3B001 · License Exception STA
CMMC Level
Level 2 Certified · Assessment ID: C3-2024-0881
IPC-A-610
Class 3 Acceptability Standard
MIL-PRF-38534
Hybrid Microcircuits Qualified
AS9100 Rev D
Aerospace QMS (Scope: Wafer Fab)
ISO 14001
Environmental Management · Cert #: ENV-29041
OHSAS 18001
Occupational Health & Safety
JEDEC Compliance
JESD47, JESD22, JESD85 qualified
Ready to engage?

Submit your GDSII, specify your node, and our process engineering team responds within 24 hours with a preliminary yield estimate and capacity slot.